Senior Silicon Power Engineer
Core
Own power-feature productization on flagship silicon programs, resolving complex multi-functional power failures and building AI-enabled characterization workflows.
Role type
Senior Silicon Power Engineer (IC)
Builds
Power-saving features and AI-driven characterization workflows for NVIDIA ASIC/SoC chips
Domain
Semiconductor / Silicon Design / Power Management
Deliverable
production ML models
Required skills
Post-silicon bring-up, power characterization, root-cause analysis, AI workflow deployment, silicon validation, cross-boundary issue resolution, tradeoff decision-making, lab instrumentation (oscilloscopes, DMM, DAQ)
Preferred skills
Windows/Linux low-power states, transistor/device physics, silicon reliability, aging mechanisms, agentic AI workflows, RAG-grounded debug assistants
Technologies
AI/ML frameworks, ATE, DAQ systems
Responsibilities
Lead cross-functional teams to execute power and low-power productization strategy; Characterize and validate new power-saving features; Debug silicon issues and codify fixes as reusable methodology; Design and deploy AI-enabled workflows for data analysis and trend detection; Serve as technical owner for tradeoffs across power, thermal, performance, and schedule; Partner with globally distributed teams including India hubs
