Senior High-Speed IO Validation Engineer
Core
Own end-to-end HSIO validation of NVIDIA GPU/CPU platforms, driving system-level debug from bring-up to production.
Role type
Senior IC hardware validation engineer (high-speed interfaces)
Builds
Next-generation GPU, CPU, and high-performance computing platforms
Domain
Semiconductor hardware / High-speed interconnects
Required skills
PCIe, NVLink, C2C, Ethernet, USB, DP, HDMI, CXL protocol knowledge; SerDes/PHY-level signal integrity; link training and margin analysis; system-level debug; test automation; board schematic and PCB layout review; lab equipment operation (DSO, BERT, protocol analyzers, TDR)
Preferred skills
PCIe physical/link layer debugging; NVLink/C2C proprietary interconnects; multi-Gbps to 400G+/800G Ethernet validation; CXL.io/.cache/.mem protocols; SerDes equalization and eye/margin analysis
Technologies
PCIe, NVLink, C2C, Ethernet, USB, DP, HDMI, CXL, SerDes, DSO, BERT, protocol analyzers, TDR
Responsibilities
Develop test plans and automation; validate high-speed interfaces across protocol/link/physical layers; bring up new hardware and debug board/system issues; review schematics/PCBs/BOMs; drive signal integrity characterization and link tuning; define test coverage for stress/corner cases; support manufacturing during NPI/MP
Seniority
Senior, hands-on IC
