Senior Power and Performance Engineer
Core
Architect and integrate system-level performance and power management features, controllers, and policies to optimize product efficiency across datacenter and client products.
Role type
Senior IC power and performance engineer (silicon co-design)
Builds
Datacenter and client silicon products with optimized power and performance
Domain
Semiconductor / Silicon Design / Power Management
Required skills
Silicon power architecture, System-level design, Validation, Power/performance optimization, Digital design, Low power design, DVFS, Control systems, Power management, Timing, Architecture, Firmware/driver structures, HW/SW interaction, C/C++, Python, Perl
Preferred skills
Clocking, Boot/reset flows, System architecture, Lab experience (oscilloscopes, multimeters, logic analyzers), Silicon bringup exposure, Cross-functional leadership, AI-assisted engineering fluency
Technologies
C, C++, Python, Perl, Oscilloscopes, Multimeters, Logic analyzers
Responsibilities
Architect and integrate system-level performance and power management features, Build feature roadmaps to address low-power and performance-per-watt needs, Partner with architecture, ASIC, board/platform, software/firmware, and marketing teams, Track industry trends and translate them into forward-looking roadmaps, Lead debug efforts and support bringup, validation, manufacturing, and customer escalations
Seniority
Senior, hands-on IC
