Senior Mixed Signal Design Engineer
Core
Senior Mixed-Signal/Analog/IO Circuit Design Engineer responsible for high-speed memory interface designs in deep submicron CMOS FinFET processes.
Role type
Senior IC analog/mixed-signal engineer
Builds
High-speed memory I/O interfaces (LPDDR, DDR, GDDR, HBM) for GPU/AI systems
Domain
Semiconductor / High-speed digital memory / Analog circuit design
Required skills
High-speed memory design (LPDDR, DDR, GDDR, HBM), FinFET circuit design, ESD and Latch-Up analysis, Cadence custom design environments, Hspice/XA/FineSim/Spectre simulation, Verilog/Nanotime/Matlab, Package substrate design, Power Delivery Network (PDN) analysis
Preferred skills
Mentoring junior engineers, hands-on validation with lab test equipment
Technologies
Cadence, Hspice, XA, FineSim, Spectre, Verilog, Nanotime, Matlab
Responsibilities
Design mixed-signal/analog circuits for high-speed memory I/O interfaces, Solve circuit design challenges in deep submicron CMOS FinFET processes, Take designs through productization across all development stages, Collaborate with multi-functional teams to optimize designs
Seniority
Senior, hands-on IC
