Senior Signal Integrity Engineer
Core
Design high-frequency channels up to 400Gb/s per lane for PCBs, packages, connectors, and cables, and create layout guidelines for NVIDIA systems.
Role type
Senior Signal Integrity Engineer
Builds
High-speed PHY ICs and NVIDIA system interconnects
Domain
Semiconductor / High-speed digital design
Required skills
Transmission line theory, Electromagnetic simulation (Ansys EM, CST), VNA & TDR measurements, PCB/package design, Multi-discipline expertise
Preferred skills
PDN analysis and modeling, NRZ/PAM-4 signaling, Circuit co-simulation, MATLAB/Python/C programming, TSV modeling
Technologies
Ansys EM, CST, VNA, TDR, MATLAB, Python, C
Responsibilities
Design high-frequency channels for PCBs, packages, connectors, and cables; Simulate passive and active elements in 3D and 2D tools; Develop layout guidelines for NVIDIA systems
Seniority
Senior, hands-on IC
