CareerPlan

Senior Mixed Signal Design Verification Engineer

Taiwan, HsinchuFull-time2026-06-30 → 2026-11-13
Hybrid

Core

Verify the design and implementation of industry-leading GPU and Mixed Signal CMOS circuit designs using advanced verification methodologies.

Role type

Senior IC mixed-signal verification engineer

Builds

High-speed Serdes platforms and GPU architectures for consumer graphics and AI

Domain

Semiconductor / Mixed-Signal CMOS Design

Required skills

Mixed Signal CMOS circuit design, System Verilog, HSpice, Finesim, XA, test bench development, debugging, analytical skills

Preferred skills

Perl, C/C++ programming, deep sub-micron process design experience

Technologies

Cadence IC design environment, HSpice, Finesim, XA, System Verilog

Responsibilities

Verify Mixed Signal CMOS circuit design and architecture, develop verification infrastructure, verify correctness of design, craft test bench environments for component and top-level circuit verification

Seniority

Senior, hands-on IC