CareerPlan

Senior Memory System Engineer

US, CA, Santa ClaraFull-time$184k–$288k2026-09-21 → 2026-11-10
Hybrid

Core

Architect and design high-speed, low-power memory solutions for NVIDIA Tegra SoCs and CPUs, focusing on DDR/LPDDR/HBM technologies.

Role type

Senior IC memory system engineer

Builds

Memory controllers, PHYs, and subsystems for NVIDIA SoCs

Domain

Semiconductor / Hardware / Memory Systems

Required skills

DDR/LPDDR/HBM memory design, Memory controller/PHY interaction, ECC algorithms, Signal Integrity (SI) and Power Integrity (PI), Failure analysis, Python/C++ for workload analysis

Preferred skills

Module and PCB layout design, DRAM supplier collaboration, Cache subsystem interaction

Technologies

DDR, LPDDR, HBM, Python, C/C++

Responsibilities

Analyze future memory technologies for performance and power optimization; Collaborate with ASIC architects and firmware teams to define memory requirements; Define memory module, package, and PCB layouts; Debug and validate memory evaluation and failure issues; Collaborate with DRAM suppliers on component technology

Seniority

Senior, hands-on IC