Senior SRAM Circuit Design Engineer
Core
Designing embedded SRAM macros and developing automated SRAM compilers for NVIDIA's SOC design partners.
Role type
Senior IC SRAM circuit design engineer
Builds
SRAM macros and automated SRAM compiler tools
Domain
Semiconductor, Digital Circuit Design, Advanced Process Nodes
Required skills
Transistor-level circuit design, SRAM macro design (single/dual-port, register files), layout implementation, physical and logical verification, debug, Python scripting, FinFET process knowledge
Preferred skills
MSEE or PhD, advanced Python scripting, Cadence schematic and layout tools, silicon testing/debug experience
Technologies
Cadence, Python, FinFET
Responsibilities
Design transistor-level SRAM circuits, supervise layout implementation, perform physical and logical verification, debug SRAM macros, develop SRAM compilers to automate macro assembly and validation, collaborate with SOC design partners on performance and cost goals
Seniority
Senior, hands-on IC
