Digital Design Verification Engineer
Core
Develop and enhance System Verilog/UVM-based testbenches to verify new and existing PCIe features for AMD's high-performance computing and AI processors.
Role type
Senior IC digital design verification engineer
Builds
Robust RTL designs for PCIe subsystems within next-gen processors
Domain
Semiconductor / High-performance computing / AI
Required skills
System Verilog, UVM, PCIe protocol knowledge, RTL design understanding, test plan creation, automation scripting, simulation tools (VCS)
Preferred skills
Formal verification, SATA/Ethernet protocols, debug tools (Debussy/DVE/Verdi), AI tool usage for productivity
Technologies
System Verilog, UVM, VCS, Debussy, DVE, Verdi, PCIe, SATA, Ethernet
Responsibilities
Develop and enhance System Verilog/UVM-based testbenches; Create staging and test plans for new feature development; Interact with architects and RTL designers to develop expertise in memory sub-system architecture; Take ownership of different verification tasks; Improve productivity through automation using AI tools
Seniority
Experienced, hands-on IC
