Design Verification Engineer
Core
Develop and maintain functional verification tests, debug test failures, and ensure code coverage for complex processor architectures.
Role type
Design Verification Engineer (ASIC/SOC)
Builds
Industry-leading IP for supercomputing, high-performance computing, cloud, and AI processors.
Domain
Semiconductor / Hardware Design Verification
Required skills
System Verilog, UVM, Verilog, C/C++, RTL debugging, functional verification, code coverage analysis, random/directed test generation
Preferred skills
DDR/Memory Controller verification, PHY verification, Python/Perl/TCL scripting
Technologies
UVM, System Verilog, Verilog, C, C++, Python, Perl, TCL, Simulation tools
Responsibilities
Develop and maintain tests for functional verification; Build directed and random verification tests; Debug test failures to determine root cause; Work with RTL and firmware engineers to resolve design defects; Work on functional and code coverage verification
Seniority
Mid-Senior, hands-on IC
