CareerPlan

Low-Power & CDC Verification Engineer

Santa Clara, CaliforniaFull-time2026-10-15 → 2026-10-22
No visa sponsorship

Core

Verify formal properties and drive convergence for low-power and clock domain crossing (CDC) features in modern processor architectures.

Role type

IC verification engineer (low-power & CDC)

Builds

Verification components and test plans for processor power features and CDC violations

Domain

Semiconductor / CPU Design / Verification

Required skills

Formal verification, Simulation, Emulation, RTL debugging, UPF, Perl/Python scripting

Preferred skills

Tape-out verification experience, Leadership

Technologies

UPF, Perl, Python, RTL

Responsibilities

Review power features for verification scoping and test plan writing; Coordinate with various teams to develop verification components; Review and sign off verification deliverables on power features; Work with RTL team to debug and sign off power/clock domain crossing violations

Seniority

Mid-level IC engineer