Senior Silicon Logical Design Engineer - Bengaluru
Core
Designing microarchitecture and RTL for Graphcore AI chips, integrating IP and subsystems into top-level SoC designs.
Role type
Senior IC silicon logical design engineer
Builds
Microarchitecture and RTL for Graphcore AI chips
Domain
Semiconductor / AI hardware
Deliverable
production ML models
Required skills
SystemVerilog, digital design flows, Python scripting, TCL scripting, synthesis, linting, CDC/RDC, timing checks, IP integration, debugging across hierarchies
Preferred skills
Processor design, high-speed serial interfaces, complex third-party IP integration, arithmetic pipeline design, floating-point design, design for test, power integrity
Technologies
SystemVerilog, Python, TCL
Responsibilities
Integrate IP and subsystems into top-level SoC designs; Develop and maintain build and configuration environments; Perform synthesis, linting, CDC/RDC, and timing checks at the SoC level; Support verification and physical design teams through clean interface hand-offs; Debug and resolve integration-related issues across multiple hierarchies; Contribute to the continuous improvement of integration flows and automation
Seniority
Senior, hands-on IC
