Semicustom DFT Strategy Lead
Core
Lead the global Design-for-Test (DFT) strategy for complex APU, GPU, and game console products, optimizing testability features and driving industry standards.
Role type
Senior IC DFT Strategy Lead
Builds
DFT strategy, test methodologies, and internal CAD automation tools
Domain
Semiconductor / ASIC Design
Required skills
DFT strategy, testability feature advocacy, post-silicon analysis, EDA/ATE industry influence, Build vs Buy decisions, team leadership for internal tool development
Preferred skills
World-class DFT roadmap definition, cross-department collaboration, partnerships with industry-leading EDA/ATE companies, internal DFT tool deployment
Technologies
EDA tools, ATE tools, CAD automation tools
Responsibilities
Drive adoption of company-wide DFT strategy across SOC and PDG teams; advocate for testability features during floor planning and timing closure; analyze post-silicon experiments to justify DFT ROI; influence EDA and ATE industry partners; evaluate external tools for Build vs Buy decisions; lead teams to architect and deploy internal DFT solutions
Seniority
Senior, hands-on IC with strategic leadership
