Hardware Validation & Debug Engineer
Core
Build and validate Graphcore's AI silicon platforms to ensure they function correctly at scale for advanced AI workloads.
Role type
Senior Hardware Validation & Debug Engineer
Builds
Next-generation AI hardware platforms (silicon, PCIe, Ethernet, SerDes)
Domain
AI Compute Hardware / High-Speed Interfaces
Deliverable
production ML models | product features
Required skills
PCIe Root Complex bring-up and debug, Ethernet SerDes debugging, high-speed interface analysis, oscilloscope usage, BERT system operation, VNA/TDR equipment usage, protocol analysis, root-cause analysis of signal integrity issues
Preferred skills
Debugging complex hardware systems, cross-functional collaboration with architecture and firmware teams
Technologies
PCIe, Ethernet, SerDes, Oscilloscopes, BERT systems, VNA, TDR
Responsibilities
Lead hands-on system validation in the lab, debug complex PCIe and Ethernet issues, drive root-cause analysis for hardware failures, bring new silicon platforms to life
Seniority
Senior, hands-on IC