Engineer, PCIe Validation
Core
Validating high-speed PCIe interfaces (controller to PHY) for next-gen AI/ML computing systems.
Role type
Hardware validation engineer (PCIe)
Builds
High-performance AI/ML compute platforms and RISC-V CPU systems
Domain
Semiconductor hardware, AI infrastructure, high-speed interfaces
Deliverable
production ML models | infrastructure
Required skills
PCIe interface validation, hardware debugging, firmware debugging, oscilloscope usage, protocol analyzer usage, JTAG debugging, system-level troubleshooting
Preferred skills
Cross-functional collaboration, rapid problem solving, familiarity with multi-die chiplet architectures
Technologies
PCIe, RISC-V, JTAG, oscilloscopes, protocol analyzers
Responsibilities
Validate next-gen PCIe interfaces from controller to PHY, debug issues across hardware/firmware/software layers, collaborate with teams to bring up new features, triage complex system-level problems
Seniority
Individual Contributor (various levels)
