RTL Design Engineer
Core
Design and implement RTL blocks for modern, complex processor architectures to meet functional, timing, area, and power requirements.
Role type
Front-end RTL Design Engineer
Builds
Processor blocks and SoC-level designs for adaptive and embedded computing
Domain
Semiconductor / Digital Logic Design
Required skills
RTL coding, Arm architecture, APB/AXI/CHI protocols, SoC integration, timing constraints, UPF, LINT/CDC checks, automation scripting
Preferred skills
Design reuse, timing exceptions, multiple power domains, self-starter mindset
Technologies
Perl, Python, Tcl, UPF, LINT, CDC, Arm, AXI, CHI
Responsibilities
Own design and implementation of blocks, guide verification, implement test/debug logic, implement automation
Seniority
Mid-level, hands-on IC
