数字后端设计工程师（存算与AI） - 芯片研发
Core
Design high-efficiency AI chips based on in-memory computing architecture to break the 'memory wall' bottleneck and serve AI large model applications.
Role type
Senior IC digital backend design engineer (in-memory computing/AI)
Builds
High-efficiency AI chips for large model applications
Domain
Semiconductor / AI Hardware
Deliverable
production ML models
Required skills
Physical design (floorplanning, placement, routing), PPA optimization, sign-off verification, netlist-to-GDS flow, EDA tools (Innovus, ICC2, FC, PT, Calibre, RedHawk), process node knowledge (28nm/16nm/7nm/5nm), PDK manual reading
Preferred skills
Technical discussion participation, cross-team collaboration (frontend/analog)
Technologies
Innovus, ICC2, FC, PT, Calibre, RedHawk
Responsibilities
Complete chip layout and routing to meet PPA targets; Complete pre-TAP sign-offs and deliver projects on time; Participate in technical discussions based on process nodes and chip characteristics; Provide feedback on frontend/analog design discussions.
