EMU验证工程（存算与AI） - 芯片研发
Core
Design and validate energy-efficient AI chips based on in-memory computing architectures to break the 'memory wall' bottleneck and support large AI models.
Role type
Senior IC verification engineer (EMU platform)
Builds
High-efficiency AI chips for large language models and AI business applications
Domain
Semiconductor / AI Hardware / In-memory computing
Deliverable
production ML models
Required skills
EMU platform development (Palladium, Veloce), ASIC code porting to EMU, verification environment migration, high-speed interface debugging (PCIe, DDR, UCIE, MIPI), SoC architecture knowledge, performance evaluation
Preferred skills
Palladium DPA/SPA usage, Palladium TBA simulation acceleration environment setup
Technologies
Palladium, Veloce, PCIe, DDR, UCIE, MIPI, SoC, ASIC
Responsibilities
Define module, subsystem, and system-level EMU platform verification plans; Port ASIC code to the EMU platform; Migrate verification environments and cases to the platform; Build and maintain EMU platform hardware/software environments; Develop tools and assist in testing/debugging with software/firmware teams; Collaborate with architecture teams for performance evaluation and exploration.
