Hardware/ Software Co-Design Engineer
Core
Designing micro-architecture and RTL implementation of low-power digital signal processors, hardware accelerators, and communication PHY/MAC for high-bandwidth brain-machine interfaces.
Role type
Senior IC hardware/software co-design engineer
Builds
Neuralink brain-computer interface SoCs
Domain
Biomedical engineering / Low-power digital signal processing / Brain-machine interfaces
Deliverable
production ML models
Required skills
Micro-architecture design, RTL implementation, Embedded software (C/Rust), SystemVerilog, C/C++, Python, Emulation models, Digital system architecture, DSP pipeline design
Preferred skills
Architecture optimization with process technology, Verification of complex digital systems, Physical design of digital systems, Debugging SoCs, Functional modeling, Tool flow automation, ISA design, Compiler back-end design
Technologies
SystemVerilog, C, C++, Python, Rust, RTL, DSP, SoC
Responsibilities
Design and optimize hardware/software interface with firmware engineers, Perform complex system modeling for energy and performance benchmarks, Conduct workload analysis and modeling, Collaborate on silicon bring-up tests with verification engineers
Seniority
Senior, hands-on IC
