CareerPlan

半導体組立工程 技術開発エンジニアシニアエンジニア

Nakatsu, jpFull-time2026-10-22 → 2026-11-11

Core

Senior IC engineer leading technical development for advanced semiconductor assembly and packaging processes (SMT, SPI, AOI, Flip Chip bonding, Flux cleaning) for AI, HPC, automotive, and IoT markets.

Role type

Senior IC semiconductor assembly and packaging process engineer

Builds

High-density, high-reliability, and high-thermal-conductivity semiconductor packages (VPS, FCCSP, FCBGA)

Domain

Semiconductor manufacturing / Advanced Packaging

Required skills

Semiconductor back-end assembly and packaging technical development, SMT/SPI/AOI/Flip Chip bonding/Flux cleaning process development, Process improvement and yield enhancement, Equipment selection and implementation, Production line launch and mass production transition support, Quality management

Preferred skills

Failure analysis using FTA and 5Why, Material selection and optimization, CAD design for fixtures and tools, Knowledge of IATF and JEDEC standards, Product management experience

Technologies

SMT, SPI, AOI, Flip Chip bonding, Flux cleaning, VPS, FCCSP, FCBGA, CAD

Responsibilities

Develop assembly technologies for advanced packages, Select and introduce equipment, Improve materials and processes, Support production line launch and mass production, Improve process quality and yield

Seniority

Senior, hands-on IC