FPGA Design Engineer
Core
Develop high-performance control path FPGAs for Arista's flagship data center networking platforms, owning the full lifecycle from architecture to production deployment.
Role type
Senior IC FPGA Design Engineer
Builds
High-speed networking and Ethernet products for enterprise campuses, hyperscaler data centers, and AI clusters
Domain
Networking hardware / FPGA design
Required skills
Verilog/SystemVerilog RTL design, Control Path design, On-Chip Bus interfaces (I2C, SPI, MDIO, PCIe, AXI), FPGA flow implementation (synthesis, place & route, timing closure), System-level integration, Toolchain automation (Python, Tcl, shell)
Preferred skills
Ethernet Data Path architecture, Streaming Bus interfaces (AXI-Stream), FPGA resource management, Lab Debugging & Validation (logic analyzers, oscilloscopes)
Technologies
Verilog, SystemVerilog, Python, Tcl, Shell, PCIe, AXI, I2C, SPI, MDIO, JTAG, Interlaken
Responsibilities
Develop, integrate, simulate, and verify RTL code; Execute full FPGA development flow including timing closure; Collaborate with hardware/software teams for system bring-up; Participate in RTL and PCB design reviews; Develop automation scripts for design workflows
Seniority
Senior, hands-on IC
