FPGA/ASIC verifikációs gyakornok
Core
Designing and implementing verification environments and testbenches for FPGA-based sensor prototypes and ASIC developments using Universal Verification Methodology.
Role type
FPGA/ASIC verification intern
Builds
Verification environments, testbenches, and test cases for IP and system-level hardware
Domain
Semiconductor hardware design and verification
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
SystemVerilog, VHDL, UVM, Python, SoC verification methodology, analytical thinking
Preferred skills
Formal verification, SystemVerilog Assertions, PyTest, High-Performance Computing, Agile, Digital signal processing, AMD-Xilinx Vivado, Microchip Libero, ARM Cortex-A, AXI bus, TCL, Matlab, Shell, Bash, C/C++
Responsibilities
Participate in designing modern verification concepts and environments for FPGA-based sensor prototypes and ASIC developments; Implement UVM and Hardware-in-the-loop test environments and test cases at IP and system levels; Report verification plan compliance to the verification lead; Collaborate daily with IP design and system integration teams
Seniority
Intern
