Principal Engineer - Design Verification
Core
Lead SoC/MCU verification for advanced microcontrollers and microprocessors, ensuring products work correctly, safely, and securely through test plan creation, coverage closure, and gate-level simulation.
Role type
Principal Engineer - Design Verification (SoC/MCU)
Builds
Advanced microcontrollers and microprocessors for automotive, industrial, infrastructure, and IoT markets
Domain
Semiconductor / Embedded Systems / SoC Design
Deliverable
production ML models | product features
Required skills
SoC verification, UVM methodology, directed and constrained random verification, metric-driven verification, formal verification, AHB/AXI protocols, memory controllers, Verilog/System Verilog, C/C++, multi-core SoC architecture, interconnects, pre- and post-silicon debugging
Preferred skills
formal verification flows, low-power verification, communication IPs (CANXL, CANFD, LIN, FLEXRAY, UART), reusable VIPs
Technologies
UVM, System Verilog, Verilog, C, C++, Perl, TCL, Python, EDA toolkits
Responsibilities
Drive verification R&D team execution and best-in-class methodologies; collaborate with system architects to verify high-level specifications; deploy next-generation EDA tools; build collaboration with RTL, DFT, digital IP, PD, and validation teams; develop technical verification execution plans and manage technical risks; ensure quality sign-offs for team hand-offs; drive innovation strategies to improve efficiency and ROI
Seniority
Principal, hands-on IC with strategic influence
