ASIC digital verification engineer_RBCN/ME
Core
Responsible for automotive ASIC chip development, setting up verification environments and tool flows, and performing function and timing verifications.
Role type
Senior IC ASIC digital verification engineer
Builds
Automotive ASIC chips
Domain
Automotive electronics / Digital IC design
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
UVM methodology, System Verilog, digital EDA tools (Cadence Incisive/Xcelium), Linux environment, scripting languages (Shell/Makefile/Tcl/Perl/Python), coverage analysis, test regression
Preferred skills
Mixed-signal verification, mentoring junior engineers
Technologies
Cadence Incisive, Xcelium, Vmanager, System Verilog, UVM, Linux, Python, Shell, Tcl, Perl
Responsibilities
Set up verification environment and tool flows for block and top levels; Create verification plans and perform function and timing verifications; Conduct verification quality control and sign-off (coverage hole analysis, test regression); Train and mentor junior verification engineers
Seniority
Mid-Senior, hands-on IC
