芯片K库工程师（芯片平台） - 芯片研发
Core
Chip platform engineer responsible for K-lib (standard cell library) development, quality assurance, and automation for multi-process chip design.
Role type
IC design engineer (K-lib)
Builds
Standard cell libraries (Kits) for multi-node chip manufacturing
Domain
Semiconductor / IC Design
Required skills
K-lib development, K-lib QA, EDA tools (Liberate/SiliconSmart/Nanocell/RedHawk/Starrc), Python, standard cell library kits (CCS/LVF/APL/PGV/LPE/NDM/LEF)
Preferred skills
PyQt5, CAD development
Responsibilities
Develop K-lib for chip projects, ensure K-lib result QA quality, participate in K-lib process automation
Seniority
Mid-level, hands-on IC
