Senior Principal Hardware Emulation Engineer
Core
Build and own high-fidelity hardware emulation models for SambaNova's next-generation Reconfigurable Dataflow Unit (RDU) to enable pre-silicon software bring-up, performance verification, and verification acceleration.
Role type
Senior Principal Hardware Emulation Engineer
Builds
Pre-silicon emulation models for AI workload acceleration chips
Domain
Semiconductor hardware design, AI accelerators, emulation platforms
Deliverable
production ML models
Required skills
SystemVerilog, C/C++, emulation platform expertise (Palladium/Veloce/Zebu), RTL design review, automation scripting (Python/shell), performance profiling, technical leadership
Preferred skills
MS/PhD in EE/CE/CS, multi-platform emulation experience, dataflow architectures, high-speed interconnect modeling, compiler/runtime background
Technologies
Palladium, Veloce, Zebu, SystemVerilog, C/C++, Python, shell
Responsibilities
Develop high-performance transactors, behavioral models, and memory models; partner with RTL design to ensure emulation compliance; own emulation environment architecture and automation workflows; drive emulator vendor relationships and issue resolution; enable software and verification teams for pre-silicon bring-up and regression testing.
Seniority
Senior, hands-on IC with technical leadership
