AI Silicon Physical Design Engineer
Core
Synthesizing, placing, and routing high-speed designs for the world's largest AI chip to enable industry-leading training and inference speeds.
Role type
Senior IC physical design engineer (AI silicon)
Builds
High-speed AI chip blocks and full-chip architecture
Domain
Semiconductor hardware design / AI infrastructure
Deliverable
production ML models
Required skills
physical design flow, block/subsystem timing closure, power/performance/area optimization, DRC/LVS verification, IR/EM analysis, STA and constraint drafting, Tcl/Python scripting, RTL collaboration, floor planning
Preferred skills
CPU/GPU design experience, Synopsys tool suite expertise
Technologies
ICV, Calibre, Design Compiler, Fusion Compiler, ICC2
Responsibilities
Synthesize, place, and route high-speed designs; collaborate with RTL teams to integrate blocks into full-chip architecture; resolve DRC and LVS issues; perform IR/EM analysis and resolution; optimize for timing convergence at block, partition, and full-chip levels
Seniority
Senior, hands-on IC