DRAM Technology Sr. Layout Design Engineer
Core
Translating schematics into layout for DRAM fabrication reticules and verifying digital/analog circuits.
Role type
Sr. IC layout design engineer (DRAM)
Builds
DRAM products and fabrication reticules
Domain
Semiconductor / Memory / VLSI
Required skills
Custom layout design in advanced CMOS, Physical verification (DRC, LVS, EM), Electromigration/IR drop/Latch-up analysis, Cadence Virtuoso, Mentor Calibre, Area optimization, Power/performance trade-offs
Preferred skills
Layout automation scripting (SKILL), AI-powered tool integration, Global team collaboration
Technologies
Cadence Virtuoso, Mentor Calibre, SKILL
Responsibilities
Develop and optimize IP layouts for DRAM products; Perform physical verification activities including DRC, LVS, EM; Collaborate with design and CAD teams to solve layout challenges; Guide team members through layout reviews and knowledge sharing; Plan and present layout strategies to stakeholders.
