Digital IC Design Engineer
Core
Designing micro-architecture and RTL for low-power digital signal processors, hardware accelerators, and communication PHY/MAC for brain-computer interfaces.
Role type
Senior Digital IC Design Engineer
Builds
High-throughput, low-power SoCs for neural recording and stimulation
Domain
Biomedical engineering / Semiconductor design
Deliverable
production ML models | product features
Required skills
Micro-architecture design, RTL implementation, SystemVerilog, C/C++, Python, DSP pipeline design, complex digital system design, energy/performance profiling
Preferred skills
Architecture optimization with process technology, verification of complex digital systems, physical design of SoCs, embedded design, processor ISA design, compiler back-end design
Technologies
SystemVerilog, C, C++, Python, industry standard EDA tools
Responsibilities
Micro-architecture design and RTL implementation of low-power DSPs, accelerators, GPUs, and radio/serial link MAC/PHY; Design and optimization of hardware/software interface; Application-specific architecture optimization including system modeling and workload analysis; Collaboration on silicon bring-up tests
Seniority
Senior, hands-on IC
