Engineer / Senior Engineer Design Verification
Core
Design verification engineer for Automotive Ethernet PHY and switch chips, ensuring functional safety, time-sensitive networking, and cybersecurity compliance.
Role type
Senior IC design verification engineer
Builds
Automotive Ethernet PHY and switch chips for mass production
Domain
Automotive semiconductors / Digital and mixed-signal verification
Required skills
UVM, constrained random testing, SystemVerilog, Verilog, C/C++, mixed-signal co-simulation, formal verification, root-cause analysis, AI tooling for verification
Preferred skills
Ethernet protocol experience (switch, PHY, MAC), functional safety certification experience
Technologies
UVM, SystemVerilog, Verilog, C/C++, Spice netlist, formal verification tools, AI verification tools
Responsibilities
Develop test plans, tests, coverage models, and debug fail tests; Build verification infrastructure bridging digital RTL with analog/mixed-signal models; Execute multi-level verification across block, sub-system, and SoC levels; Perform root-cause analysis for complex simulation failures; Engage in developing new verification methodologies for functional safety certification
Seniority
Senior, hands-on IC
