Mixed-Signal Verification Intern
Core
Support verification of Analog Mixed-Signal (AMS) Intellectual Property (IPs) and System-on-Chips (SoCs) by building testbenches, running simulations, and debugging issues across analog and digital domains.
Role type
Mixed-Signal Verification Intern
Builds
AMS IPs and SoCs
Domain
Semiconductor / Mixed-Signal Design
Required skills
Verilog/SystemVerilog fundamentals, AMS concepts (Op-amp, ADC/DAC, PLL, LDO, noise, stability, PVT), SPICE/Verilog-AMS/Spectre simulation, Linux, Python/Shell scripting, debugging
Preferred skills
None stated
Technologies
SPICE, Verilog-AMS, Spectre, Python, Shell, Make
Responsibilities
Develop and maintain mixed-signal verification environments; Run AMS simulations and analyze waveforms; Execute test plans, create cases, track coverage, and document results; Debug failures by correlating RTL, analog models, and integration; Automate regressions, log parsing, and reporting; Validate model quality, including behavioral assumptions and corner cases
Seniority
Intern
