CareerPlan

Engineer / Senior Engineer - Design Engineering

SingaporeFull-time2026-07-20 → 2026-10-24

Core

Develop state-of-the-art verification environments and constrained random tests for automotive Ethernet switches to identify pre-silicon design bugs and ensure functional safety.

Role type

Senior IC Design Verification Engineer

Builds

Automotive Ethernet PHY and switch chips

Domain

Automotive semiconductor / Networking

Required skills

UVM, SystemVerilog, C++, Java, Perl, Python, Make, coverage-driven testing, constrained random testing, test plan design, functional safety certification

Preferred skills

Experience with mass-production chip verification, knowledge of time-sensitive networking, cybersecurity, traceability

Technologies

UVM, SystemVerilog, C++, Java, Perl, Python, Make

Responsibilities

Develop verification environments for automotive Ethernet switches; formulate and develop coverage-driven, constrained random tests; collaborate with design engineers and verification architects to design test plans and coverage models; engage in developing new verification methodologies and continuous workflow improvement for functional safety certification

Seniority

Senior, hands-on IC