Senior Staff Engineer Analog Mixed-Signal Verification
Core
Develop AI-based behavioral Real Number Models (RNM) and lead verification for automotive analog/mixed-signal (AMS) subsystems and full-chip designs.
Role type
Senior Staff IC Analog Mixed-Signal Verification Engineer
Builds
Pre-silicon validation environments and test plans for automotive AMS products
Domain
Automotive electronics, Analog/Mixed-Signal IC design
Deliverable
production ML models
Required skills
SystemVerilog, AMS verification, Behavioral modeling (RNM), Test plan development, Checkers and assertions, Coverage solutions, EDA tools (Cadence Virtuoso, Xcelium, Synopsys VCS), Analog circuit concepts (BGR, LDO, Buck-Boost), Python/Perl/Shell scripting, Power analysis at SoC level
Preferred skills
AI-based modeling techniques, Post-silicon characterization support, Project scope and schedule management, Mentoring junior engineers
Technologies
SystemVerilog, Python, Perl, Shell, Cadence Virtuoso, Xcelium, Synopsys VCS, APS/XPS, Customsim
Responsibilities
Develop AI-based behavioral RNM models for AMS verification; Lead AMS verification at subsystem and full-chip levels; Develop AMS test plans and integrate Spice netlists; Implement TB components, checkers, assertions, and coverage; Interact with Analog, RTL, and DV teams for system-level scenarios; Provide support to characterization teams during post-silicon validation; Mentor junior engineers and manage project dynamics.
Seniority
Senior Staff, hands-on IC with mentorship