Design Verification - Technical Leader
Core
Drive verification strategy and closure for complex digital IPs in imaging and automotive subsystems, acting as the technical point of contact for cross-functional teams.
Role type
Senior IC digital verification technical leader
Builds
Complex digital IPs and subsystems for imaging and automotive applications
Domain
Semiconductor / Digital IC Design / Verification
Required skills
System Verilog, UVM methodology, functional coverage, code coverage, assertion-based verification (SVA), formal verification (JasperGold), protocol verification (I3C, MIPI, AMBA), scripting (Python/Perl/TCL), simulation tools (VCS/Xcelium/Questa)
Preferred skills
Team mentoring, mutation testing, low-power verification (UPF/CPF), EDA tool expertise, verification IP (VIP) development
Technologies
UVM, System Verilog, JasperGold, VCS, Xcelium, Questa, I3C, MIPI, AMBA, Python, Perl, TCL
Responsibilities
Own end-to-end verification strategy, planning, and closure; Architect and review UVM-based verification environments; Drive functional and code coverage closure; Lead protocol-level verification efforts; Apply formal verification techniques; Mentor junior engineers; Drive process improvements
Seniority
Senior, hands-on IC with leadership responsibilities
