Senior Engineer - ASIC Verification
Core
Verify digital ASIC IPs for mobile network standards (5G/6G) at the block and subsystem level.
Role type
Senior ASIC Verification Engineer
Builds
Custom-made Ericsson System on a Chip (SoC) devices for mobile networks
Domain
Telecommunications / Hardware Design
Required skills
SystemVerilog, UVM, Verification Planning, Scoreboards, Checkers, Bus Functional Models, AMBA protocols (AXI, CHI), SystemVerilog Assertions, Cadence/Synopsys verification suites
Preferred skills
Low-power design verification, Formal Verification, ARM-based embedded systems, Digital Signal Processing, CI/CD tools (Jenkins), Issue tracking (Jira)
Technologies
SystemVerilog, UVM, Cadence, Synopsys, AXI, CHI, Jenkins, Jira
Responsibilities
Define and implement UVM-based test environments; Develop and debug test cases; Collaborate with designers and architects; Generate verification documentation; Optimize verification methodologies
Seniority
Senior, hands-on IC
