Sr. Engineer, Package Design
Core
Create board-level routing studies, design mock-ups, and SI/PI modeling collateral to support advanced semiconductor package development and early-stage package/board co-design.
Role type
Senior IC package design engineer
Builds
Representative PCB routing environments for BGA optimization, package escape studies, and system-level electrical modeling
Domain
Semiconductor hardware / Advanced packaging
Deliverable
product features
Required skills
Cadence Allegro PCB Designer, high-pin-count BGA design, routing congestion analysis, layer utilization analysis, signal escape strategy, Signal Integrity (SI), Power Integrity (PI)
Preferred skills
Chiplet architecture, 2.5D Packaging, On/Off-Package Memory, backside power delivery, integrated voltage regulators, package embedded passives, automation, data analytics, AI techniques
Technologies
Cadence Allegro
Responsibilities
Develop representative PCB routing environments for BGA optimization, conduct package escape studies, perform system-level electrical modeling, analyze routing congestion and layer utilization, evaluate implementation tradeoffs
Seniority
Senior, hands-on IC
