Analog Mixed-Signal Layout Intern
Core
Assist in the design and layout of high-performance analog and mixed-signal IP blocks, translating schematic designs into silicon.
Role type
Analog Mixed-Signal Layout Intern
Builds
High-performance analog and mixed-signal IP blocks
Domain
Semiconductor IC design, Analog/Mixed-Signal
Deliverable
production ML models | product features | dashboards & analysis | research | client delivery | infrastructure | physical/clinical work
Required skills
Analog/mixed-signal IC design concepts, EDA tools (Cadence Virtuoso, Synopsys, Mentor Graphics), layout symmetry, matching techniques, common centroid structures, DRC, LVS, parasitic extraction
Preferred skills
Version control systems (Git, Perforce), CMOS/FINFET device structure knowledge, analog layout techniques
Technologies
Cadence Virtuoso, Synopsys, Mentor Graphics
Responsibilities
Assist in layout design of analog and mixed-signal circuits (current mirrors, differential pairs, op-amps, bandgaps, comparators), Perform layout-vs-schematic (LVS), design-rule checks (DRC), and parasitic extraction (PEX), Support floor planning, placement, routing, and matching for analog blocks, Work with circuit designers to optimize layout for performance, area, and reliability, Document layout work and contribute to layout review checklists and verification reports
Seniority
Intern