Soc Design Verification Director
Core
Lead end-to-end verification strategy and execution for next-generation System-on-Chip products in compute, networking, and storage domains to ensure first-pass silicon success.
Role type
Director of SoC Design Verification (hands-on leadership)
Builds
Next-generation SoC silicon products
Domain
Semiconductor / Hardware Design Verification
Deliverable
production ML models | product features
Required skills
SoC-level verification strategy, UVM-based test plan development, assertion writing, coverage analysis, IP integration, HSIO verification, coherency fabric verification, memory controller verification, emulation, FPGA prototyping, AI-augmented verification flows
Preferred skills
NoC-based interconnect verification, QoS analysis, low-power verification, AI/ML accelerator verification, automotive SoC verification, data center SoC verification, high-performance computing SoC verification
Technologies
UVM, Formal Verification, Emulation, FPGA, CXL, Ethernet, NVLink, PCIe, UALink
Responsibilities
Define SoC-level verification strategy and oversee execution across multiple IPs and subsystems; Mentor and grow a diverse team of verification engineers; Collaborate with RTL design, architecture, firmware, and validation teams to debug and optimize processes; Represent verification in executive reviews and industry forums; Drive adoption of advanced methodologies to accelerate coverage closure.
Seniority
Director, strategic leadership with hands-on technical expertise
