CareerPlan

Staff Layout Designer

San Jose, California, United States of AmericaFull-time2026-11-06 → 2026-11-10

Core

Develop and prepare multi-dimensional semiconductor device layouts from schematics, verify data integrity, and lead major block developments.

Role type

Staff IC layout designer

Builds

Non-volatile memory products (NAND, DRAM, SRAM)

Domain

Semiconductor / Memory

Required skills

Semiconductor layout design, EDA tools (Cadence Virtuoso, Synopsys, Calibre), root-cause analysis, custom layout/floor-planning methodologies, physical verification, design rules, automation development

Preferred skills

NAND/DRAM/SRAM layout experience, project leadership, AI/Agentic AI workflow development, programming skills

Technologies

Cadence Virtuoso, Synopsys, Calibre

Responsibilities

Organize logistics and resource allocations to meet deadlines, assign resources and schedule tasks, mentor junior team members, contribute to layout efficiency via automation, lead major block and product revisions

Seniority

Staff, hands-on IC with mentorship