ASIC Analog Design Engineer
Core
Design and develop high-speed PHYs in deep sub-micron technologies for Micron's tester and controller IP.
Role type
Senior IC ASIC Analog Design Engineer
Builds
High-speed memory interfaces (DDR, LPDDR, GDDR) and SerDes interfaces (PCIe, M-PHY, HDMI, USB, SATA)
Domain
Semiconductor / Memory and Storage
Required skills
ASIC analog design, high-speed SerDes and PHYs, analog and mixed-signal (AMS) design, advanced CMOS and FinFET technologies, circuit architecture, electrical specifications, schematic design, simulation, analog layout, floorplanning, parasitics analysis, silicon bring-up and characterization, signal integrity, power delivery, ESD
Preferred skills
High-speed memory interface standards (DDR3/4/5, LPDDR3/4x/5, GDDR5/6), SerDes interfaces (PCIe, M-PHY, HDMI, USB, SATA), full ownership of sub-blocks (PLL, DLL, CDR, equalization, transmitter front end, data path), system-level modeling (VerilogA/Python)
Technologies
Cadence ADE, Spectre, AMS verification, EM/IR flows, MATLAB, Pegasus
Responsibilities
Propose circuit architectures, refine electrical specifications, draw schematics, verify designs through simulation, supervise complex analog layout and define block floorplans, investigate parasitics to debug layout-related performance issues, present complex engineering ideas to the design team and customers, explore the design space and provide feedback on design tradeoffs, align requirements with package and board teams, plan and participate in silicon bring-up and characterization, work with the validation team to perform tests and resolve silicon debug issues
Seniority
Senior, hands-on IC
