Senior Verification Engineer - Hardware
Core
Create UVM-based verification testbenches and methodologies to verify complex IP and sub-systems for next-generation automotive chips.
Role type
Senior IC hardware verification engineer (automotive SoC)
Builds
Verification environments, test plans, bus functional models, monitors, checkers, and scoreboards for CPU, memory, and interconnect fabrics.
Domain
Semiconductor hardware design and verification (automotive chips)
Required skills
UVM methodology, C/C++, System level verification, Bus functional modeling, Functional coverage management, Simulation and debug tools, Formal verification exposure, High-speed IO verification (UFS/PCIe/XUSB), CPU/Memory/Interconnect verification, Bus protocols (AXI/APB)
Preferred skills
Safety/Security/Virtualization verification, Sensor processing verification
Technologies
UVM, C/C++, AXI, APB, PCIe, UFS, XUSB, Ethernet MAC/Switch
Responsibilities
Architect testbenches and craft verification environments using UVM methodology; Define test plans, tests, and verification infrastructure for modules, clusters, and systems; Build efficient and reusable bus functional models, monitors, checkers, and scoreboards; Implement functional coverage and own verification closure; Collaborate with architects, designers, FPGA, and post-silicon teams to ensure unit robustness.
Seniority
Senior, hands-on IC
