Senior Engineer Design
Core
Design and optimize critical NAND core circuits, including row drivers, column drivers, sense amplifiers, and associated control circuitry for memory and storage solutions.
Role type
Senior IC analog/mixed-signal engineer (NAND)
Builds
NAND memory arrays and subsystems
Domain
Semiconductor / Memory / Storage
Required skills
Analog circuit design, Mixed-signal circuit design, CMOS device physics, Flash/NAND memory architecture, Circuit simulation (HSPICE, FastSPICE, NC-Verilog), Timing optimization, Layout supervision, Scripting and automation, AI-enabled design methodologies, Mentorship
Technologies
HSPICE, FastSPICE, NC-Verilog
Responsibilities
Design and optimize critical NAND core circuits, Identify and implement opportunities to improve power, performance, area, and timing, Perform circuit analysis and optimization from base-cell level through full-chip integration, Drive block-level and subsystem-level design, timing optimization, verification, and layout supervision, Collaborate with Logic/RTL teams to define and support Flash array functionality, Develop integrated Analog/Mixed-Signal (AMS) solutions, Work with project teams to define the full-chip floorplan, Partner with Technology teams to develop array operating conditions, Drive circuit-level analysis to identify design margins and bottlenecks, Leverage scripting and automation to improve engineering productivity, Adopt a "Design + AI" methodology to accelerate design and validation, Mentor junior design engineers, Develop and maintain Micro-Architecture Specifications (MAS)
Seniority
Senior, hands-on IC
