Principal Mixed Signal Design Engineer
Core
Define and own mixed-signal architecture for critical HBM and DRAM subsystems, including high-speed I/O, PHY circuits, clocking, and data path analog front-end.
Role type
Principal Mixed Signal Design Engineer (Memory/Storage)
Builds
High-bandwidth memory (HBM) and DRAM products for data centers and AI applications
Domain
Semiconductor / Memory and Storage
Deliverable
production ML models
Required skills
Mixed-signal architecture, High-speed I/O design, PLL/DLL design, Analog front-end design, Power management, Pre-silicon validation, Post-silicon bring-up, AI/ML-assisted design methodologies, Cross-functional leadership
Preferred skills
Data-driven methods, Automation, AI-enabled tool integration
Technologies
HBM, DRAM, SerDes, Sense amplifiers, Clock/data recovery, Power management ICs
Responsibilities
Define mixed-signal architecture for HBM/DRAM subsystems; Drive architectural tradeoffs across performance, power, and area; Lead design of advanced mixed-signal circuits; Lead pre-silicon validation and post-silicon bring-up; Mentor senior and staff-level engineers; Establish design methodologies and modeling standards.
Seniority
Principal, hands-on IC design with mentorship
