Senior/Staff Engineer - HIG HBM PSE
Core
Lead end-to-end validation execution for HBM memory products, managing high-pressure test runs, data analysis pipelines, and silicon debug to ensure product reliability and performance.
Role type
Senior/Staff Validation Engineer (HBM)
Builds
High-performance DRAM/HBM memory products for data centers, AI, and 5G applications
Domain
Semiconductor / Memory Storage / Validation Engineering
Deliverable
production ML models
Required skills
HBM validation, MBIST/Native Mode testing, Verilog simulation, C/C++/Python/APG, high-speed I/O characterization, data analytics, automation scripting
Preferred skills
Linux programming, UVM, lab equipment operation, CS/QS shmoo target definition, ML-driven validation workflows, AI tool literacy
Technologies
SM3/Cobra, Advantest V93K, Confluence, Jira, Git, Perforce, Oscilloscopes, Logic Analyzers
Responsibilities
Lead end-to-end Validation Run execution; Own time-bound data crunching pipelines; Develop and debug test programs; Perform power/thermal characterization; Architect and execute Verilog simulations; Lead silicon debug across cross-functional teams; Mentor junior engineers
Seniority
Senior/Staff, hands-on IC with mentorship
