Intern - Next Gen HBM Platform Arch
Core
Develop future High Bandwidth Memory (HBM) platforms by evaluating electrical, thermal, and power delivery architectures for advanced memory systems.
Role type
Intern, HBM Platform Architect
Builds
Next-generation HBM solutions for AI, high-performance computing, and data center applications
Domain
Semiconductor / Memory / Electrical Engineering
Deliverable
production ML models
Required skills
Signaling and timing analysis, Thermal modeling, Power delivery network (PDN) analysis, Modeling and simulation tool development, System-level trade-off evaluation, Technical documentation interpretation
Preferred skills
Cadence EDA tools, MATLAB, Semiconductor packaging knowledge, Python programming, HBM/DRAM interface knowledge, Engineering automation tool development
Technologies
Python, MATLAB, Cadence EDA, LLMs (Copilot, Claude, ChatGPT)
Responsibilities
Perform signaling and timing analysis for on-die and off-die interfaces; Develop and evaluate thermal models for heat transfer and performance; Analyze power delivery networks including IR-drop and electromigration; Develop modeling, simulation, and automation tools; Collaborate with architecture, design, and packaging teams to evaluate system-level trade-offs
Seniority
Intern
