Senior Engineer - HIG HBM PSE - Design Validation
Core
Develop next-generation High Bandwidth Memory (HBM) products through silicon validation, debugging, and qualification to enable ML and AI solutions.
Role type
Senior IC Design Validation Product Engineer (HBM)
Builds
HBM memory packages (DRAM + logic chips via TSV) for Machine Learning and AI applications
Domain
Semiconductor / Memory / High Bandwidth Memory (HBM)
Deliverable
production ML models
Required skills
JEDEC specifications, schematic design, layout knowledge, circuit simulation, data analysis, hardware/software debugging, silicon validation
Preferred skills
VLSI, semiconductor process, Python, C/C++, Verilog, VHDL, System Verilog
Technologies
TSV, DRAM, Logic chips, Gate-level design, RTL
Responsibilities
Understand JEDEC specifications for HBM; craft internal architecture documentation and schematic/layout; perform silicon validation and debug via lab, simulation, and data analysis; contribute to validation methodology improvements
Seniority
Senior, hands-on IC
