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Layout/Mask Design Engineer

Boise, Idaho, United States of AmericaFull-time2026-09-28 → 2026-10-07

Core

Design and implement physical layouts for advanced digital, analog, and mixed-signal circuits used in memory products, translating schematics into manufacturable designs.

Role type

IC Layout/Mask Design Engineer

Builds

Memory chips (digital, analog, mixed-signal)

Domain

Semiconductor / Memory

Required skills

Device physics, Material characteristics, Electron microscopy (SEM), Thermodynamics, Layout design, Floor planning, Routing, Power bus design, DRC/LVS verification, Cross-functional collaboration

Technologies

null

Responsibilities

Perform block-level floor planning and area estimation; Execute routing and power bus design; Ensure compliance with foundry design rules; Collaborate with design and process teams for manufacturability; Create and maintain layout documentation.

Seniority

null