CareerPlan

ASICS Design Engineer, Principal

Hsinchu City, TaiwanFull-time2026-10-27 → 2026-11-10

Core

Define architecture and roadmap for next-generation Ethernet switch ASICs, leading design across forwarding engines, traffic management, and scheduling subsystems.

Role type

Principal ASIC Design Engineer (Networking)

Builds

High-performance Ethernet switch ASICs and packet processing subsystems

Domain

Semiconductor / Networking

Required skills

ASIC architecture, RTL coding, verification, synthesis, timing closure, physical design, Ethernet switch architecture, forwarding pipelines, traffic management, QoS, scheduling, SoC design, cross-functional leadership, system-level debugging

Preferred skills

Merchant silicon or switching ASIC experience (Broadcom/Marvell/Realtek/MTK), mentorship of senior leaders

Technologies

ASIC design tools, RTL, verification frameworks, synthesis tools, timing closure tools, physical design tools

Responsibilities

Drive architecture definition and technical strategy for Ethernet switch ASICs, lead design across multiple subsystems, drive cross-functional alignment with HW/SW/Product teams, lead performance analysis and trade-off studies, mentor senior technical leaders, ensure execution from architecture through silicon delivery

Seniority

Principal, hands-on IC with strategy & mentorship