NoC Interconnect Design Engineer and Architect
Core
Define, model, design, optimize, verify, validate, implement, and document IP (block/SoC) development for high performance, high quality, low power products.
Role type
Senior IC ASIC design engineer and architect
Builds
High performance, low power ASICs and SoCs for next-generation communication and data processing products
Domain
Semiconductor / ASIC Design
Required skills
ASIC design, digital/analog design, system simulation, RTL to GDS flow, Virtuoso, scripting, design verification
Preferred skills
Electrical/Electronic Engineering degree, architecture and design tools, scripting tools and programming languages, design verification methods
Technologies
Virtuoso, RTL, GDS
Responsibilities
Create architectures, circuit specifications, logic designs, and system simulations; Collaborate across teams to develop implementation strategies; Evaluate process flow from high-level design to synthesis, place and route, timing, and power use; Write detailed technical documentation for EDA/IP/ASIC projects
Seniority
Senior, hands-on IC
