RISC-V System IP Design Lead
Core
Lead the design of RISC-V or ARM System-on-Chip (SoC) micro-architectures and IP blocks, managing the full design convergence cycle from architecture to silicon.
Role type
Senior IC System IP Design Lead
Builds
RISC-V/ARM CPU cores, interconnects (CHI/AHB/AXI/ACE), and NoC concepts for SoCs
Domain
Semiconductor / Hardware Engineering
Required skills
RISC-V or ARM ISA knowledge, SoC design, Verilog RTL coding, Digital Design, Interconnect protocols (CHI/AHB/AXI/ACE/ACE-Lite/NoC), CPU architecture, Coherency protocols, Virtualization, Synthesis (DC/DCG), DFT, Formal verification, Silicon debug, Lint, CDC, PLDRC, CLP
Preferred skills
Leadership, Project management, Design convergence cycle expertise
Technologies
Synopsys Design Compiler, Verilog, RTL
Responsibilities
Manage SoC dependencies, planning, and tracking of front-end design tasks; Drive project milestones across design, verification, and physical implementation; Lead micro-architecture and RTL development.
Seniority
Senior, hands-on IC
